Unit 8
Instruction design & I/O Organisation: machine instruction, instruction set selection, instruction cycle, instruction format and addressing mode, I/O interface, interrupt structure, program controlled, interrupt-controlled and DMA transfer, I/O channels, IOP
Register
These are special memory units used to hold information on a temporary basis as the instructions are interpreted and
executed by the CPU.
Registers are part of CPU (not main memory)
The length of a register, sometimes called its word size, equals the number of bits it can store.
Some of the registers are:
Program counter (PC) - an incrementing counter that keeps track of the memory address of the instruction that is
to be executed next or in other words, holds the address of the instruction to be executed next.
Memory address register (MAR) - holds the address of a memory block to be read from or written to.
Memory data register (MDR) - a two-way register that holds data fetched from memory or data waiting to be
stored in memory. (This is also known as the memory buffer register (MBR).)
Instruction register (IR) - a temporary holding ground for the instruction that has just been fetched from memory.
Control unit (CU) - decodes the program instruction in the IR, selecting machine resources such as a data source
register and a particular arithmetic operation, and coordinates activation of those resources.
Arithmetic logic unit (ALU) - performs mathematical and logical operations.
Accumulator register (AC) – holds data to be operated upon, intermediate results and final results.
TIMING:
The timing of all registers in a computer is controlled by a master clock generator. These clock pulses do not
change the state of a register until enable control signal is not given.
IMPORTANT LINKS HARE
LINKS
SYLLABUS
executed by the CPU.
Registers are part of CPU (not main memory)
The length of a register, sometimes called its word size, equals the number of bits it can store.
Some of the registers are:
Program counter (PC) - an incrementing counter that keeps track of the memory address of the instruction that is
to be executed next or in other words, holds the address of the instruction to be executed next.
Memory address register (MAR) - holds the address of a memory block to be read from or written to.
Memory data register (MDR) - a two-way register that holds data fetched from memory or data waiting to be
stored in memory. (This is also known as the memory buffer register (MBR).)
Instruction register (IR) - a temporary holding ground for the instruction that has just been fetched from memory.
Control unit (CU) - decodes the program instruction in the IR, selecting machine resources such as a data source
register and a particular arithmetic operation, and coordinates activation of those resources.
Arithmetic logic unit (ALU) - performs mathematical and logical operations.
Accumulator register (AC) – holds data to be operated upon, intermediate results and final results.
TIMING:
The timing of all registers in a computer is controlled by a master clock generator. These clock pulses do not
change the state of a register until enable control signal is not given.
IMPORTANT LINKS HARE
LINKS
SYLLABUS
Unit 1
Number Systems | Binary Arithmetic | Fixed-point and Floating point representation of numbers | BCD Codes | Error detecting and correcting codes | Character Representation – ASCII, EBCDIC, Unicode
Unit 2
Boolean Algebra | Boolean Theorems | Boolean Functions and Truth Tables | Canonical and Standard forms of Boolean functions | Simplification of Boolean Functions – Venn Diagram, Karnaugh Maps.
Unit 3
Unit 4
Unit 5
Sequential logic: Characteristics | Flip-flops | Clocked RS,D type, JK,T type and Master slave Flip-flops | State table | State diagram and state equation | flip-flop excitation table
Unit 6
Sequential Circuit: designing register | serial input serial output (SISO) | Serial input parallel output (SIPO) | Parallel input serial output (PISO) | Parallel input parallel output(PIPO) and shift register | designing Counters-ASYNCHRONOUS and SYNCHRONOUS binary counters | modulo-N Counters and Up Down counters
Unit 7
Memory and I/O Device: memory parameters | semiconductor RAM,ROM |magnetic and optical storage device | flash memory | I/O device and their controllers
Unit 8
Instruction design & I/O Organisation: machine instruction | instruction set selection | instruction cycle | instruction format and addressing mode | I/O interface | interrupt structure | program controlled | interrupt-controlled and DMA transfer | I/O channels | IOP
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